구분

연수주제

연구책임자

1

Development of tip array sensors for characterization of nanoelectronics device structures by SPM

Thomas Hantschel

2

Development of advanced SPM tomography for characterization of nanoelectronics device structures

Thomas Hantschel

3

High stability mechanism of CQD photodiodes for SWIR detection

Sangyeon Lee

4

Study of high aspect ratio gate etch for advanced CMOS transistor technologies

Emmanuel DUPUY

5

Infrared Depth sensing with Colloidal Quantum Dot Photodetectors

Joo Hyoung Kim

6

Advanced plasma etching of novel materials

Leila Ghorbani

7

Artifact-tolerant analog frontend for neuromodulation system in high-voltage BCD technology

Chutham

8

Corrective selective hard mask growth for High NA patterning

Rémi Vallat

9

Study of dep/etch cycling process for high aspect ratio etch

Subhobroto Choudhury

10

Development of plasma dicing process for 3D integration

Violeta Georgieva

11

Wet processing of high aspect ratio nanostructures

Guy Vereecke

12

In-situ ATR-FTIR study of wetting transition on HAR nanostructures

Xiumei Xu

13

Next-generation Readout Circuit Design of Thin-film Photodiode based image sensor for SWIR detection

Myonglae Chu

Department

FAB/MCA

Full Name of Mentor

Thomas Hantschel

Email

Thomas.Hantschel@imec.be

Project Period

12 months

Project Topic

Development of tip array sensors for characterization of nanoelectronics device structures by SPM

Summary of Research project

Development of advanced sensor structures for application in innovative scanning probe microscopy (SPM). Ultra-sharp tip structures will be fabricated and integrated into tip array chips. The student will design the lithography masks in the first phase. Then, the student will do the lithography, etching and coating steps in a cleanroom environment. The fabricated structures will be evaluated by inspection and SPM measurements

Monthly Plan

1st Month

Safety, cleanroom, lab & tool training, literature study

2nd Month

Lithography mask design - version 1, literature study

3rd Month

Cleanroom tip chip fabrication, diamond growth training

4th Month

Cleanroom tip chip fabrication, diamond growth

5th Month

Tip chip evaluation & measurements

6th Month

Tip chip evaluation, mid-term presentation

7th Month

Cleanroom tip chip fabrication, diamond growth training

8th Month

Cleanroom tip chip fabrication, diamond growth

9th Month

Tip chip evaluation & measurements

10th Month

Tip chip evaluation & benchmarking

11th Month

Finishing experiments, Drafting of results paper

12th Month

Drafting of results paper, final results internship presentation in department meeting

Department

FAB/MCA

Full Name of Mentor

Thomas Hantschel

Email

Thomas.Hantschel@imec.be

Project Period

12 months

Project Topic

Development of advanced SPM tomography for characterization of nanoelectronics device structures

Summary of Research project

Development of nanoelectrical device tomography based on innovative scanning probe microscopy (SPM) approaches whereby the material is nanomechanically removed in nanometer thick slices while being electrically probed in between slicing. The project involves the setup, execution and analysis of suitable 3D scanning experiments and the tomography data reconstruction. The measurements serve in the first part the further improvement of the technique and in the second part to gain a better understanding of the investigated device structures.

Monthly Plan

1st Month

Safety, lab & tool training, literature study

2nd Month

Tool practising & skill improvement, sample prep, literature study

3rd Month

Nanomechanical materials removal study

4th Month

Nanoelectrical 3D device measurements

5th Month

Tomography data visualization & interpretation

6th Month

Tomography data visualization & interpretation, mid-term presentation

7th Month

Device measurements & data analysis study

8th Month

Device measurements & data analysis study

9th Month

Device measurements & data analysis study

10th Month

Device measurements & data analysis study

11th Month

Finishing experiments, Drafting of results paper

12th Month

Drafting of results paper, final results internship presentation in department meeting

Department

Sensors and Actuators

Full Name of Mentor

Sangyeon Lee

Email

Sangyeon.Lee@imec.be

Project Period

12 months

Project Topic

High stability mechanism of CQD photodiodes for SWIR detection

Summary of Research project

Colloidal qunatum dot based photodiode are studying for the alternative SWIR photodiode, consiting of III-V and MCT materials, because of cost-effective and monolitic processes. In this project, internship students will be conducting on the study of reliabilty mechansim of CQD photodiodes under various environments for SWIR detection

Monthly Plan

1st Month

Equipment traning, review of related papers

2nd Month

Equipment traning, review of related papers

3rd Month

Equipment traning, review of related papers / Conducting experiments

4th Month

Conducting experiments

5th Month

Conducting experiments

6th Month

Conducting experiments

7th Month

Conducting experiments

8th Month

Conducting experiments

9th Month

Conducting experiments / Deriving data

10th Month

Deriving data

11th Month

Deriving data / Writing paper (Journal of Materials Chemistry C)

12th Month

Writing paper (Journal of Materials Chemistry C)

Department

IMECBE-STS-APPM-UPM-ECCP-ETCH-ETCHSCE

Full Name of Mentor

Emmanuel DUPUY

Email

Emmanuel.Dupuy@imec.be

Project Period

12 months

Project Topic

Study of high aspect ratio gate etch for advanced CMOS transistor technologies

Summary of Research project

This research project is devoted to the study of gate etch at nanometer-scaled dimensions by optimization of process parameters using state-of-the art techniques and plasma reactors. The main objective of this work is to explore the relation between gate etching profile and plasma conditions. Plasma conditions including advanced pulsing modes will be screened and tuned for optimal gate profiles. The gate profile will be studied using X-SEM, CDSEM, and TEM. The intern will work in a 300 mm cleanroom. Basic training on working regulations is mandatory as a starting. Technical training on plasma processing and relevant metrology will be arranged, so that the intern can work independently.

Monthly Plan

1st Month

Equipment training, Review of related papers

2nd Month

Equipment training, Review of related papers

3rd Month

Equipment training, Review of related papers

4th Month

Conducting experiments

5th Month

Conducting experiments

6th Month

Conducting experiments

7th Month

Conducting experiments

8th Month

Conducting experiments

9th Month

Conducting experiments

10th Month

Summary data and review

11th Month

Summary data and review

12th Month

Drafting a paper

Department

SAT

Full Name of Mentor

Joo Hyoung Kim

Email

Joo.Hyoung.Kim@imec.be

Project Period

12 months

Project Topic

Infrared Depth sensing with Colloidal Quantum Dot Photodetectors

Summary of Research project

Colloidal Quantum Dot (CQD) technology can revolutionize non-visible imaging which is not accessible with silicon technology. It can offer exceptional performance at low-cost enabled by wafer-level monolithic integration. Markets include robotics, automotive, AR/VR and consumer electronics. Potential use cases include advanced face identification, eye tracking, night vision, advanced driver assistance systems (ADAS), multispectral machine vision for medical and industrial markets. CQD technology has shown excellent performance in SWIR imaging and its process has been made compatible with semiconductor manufacturing in a complementary metal oxide-semiconductor (CMOS) fab, and potentially high detectivity and high speed, making it more interesting for sensing (e.g. 3D/depth). Development of CQD Photodetector (CQDPD) is ongoing within imec targeting a fast photoresponse time. One of the most interesting application case will be doing the depth sensing based on gated imaging from this high speed performance at SWIR wavelengths, where the low solar radiation background and less light absorption or scattering is expected to have higher signal to noise ratio, thus better depth resolution, and maximum detection range.

Monthly Plan

1st Month

Setting up Imager measurement enviroments (Software, hardware)

2nd Month

Imager full characteriazation

3rd Month

Imager full characteriazation

4th Month

Depth sensing feasibility tests (visible)

5th Month

Depth sensing feasibility tests (visible)

6th Month

IR depth sensing feasibility tests

7th Month

IR depth sensing feasibility tests

8th Month

IR depth sensing and mapping

9th Month

IR depth sensing and mapping

10th Month

Paperwork

11th Month

Paperwork

12th Month

Paperwork

Department

IMECBE-STS-APPM-UPM-ECCP-ETCH-ETCHNOMA

Full Name of Mentor

Leila Ghorbani

Email

Leila.Ghorbani@imec.be

Project Period

12 months

Project Topic

Advanced plasma etching of novel materials

Summary of Research project

The student will work on patterning of novel material combinations, in this case quaternary element-based chalcogenides, which are being considered for use in advanced high-speed memory applications. The student will learn to work on the advanced etch tools in the clean room which are used for patterning memory devices. He/She will expose the chalcogenide material to different plasma chemistries and will try to understand the impact of these chemistries on the surface morphology, stochiometry or crystallography of the deposited chalcogenide. These are very crucial aspects to understand as any change in the chalcogenide during its patterning into memory devices can impact its elctrical performance.

Monthly Plan

1st Month

Introduction to imec, etch tool trainings and studying plasma etch fundamentals

2nd Month

Literature review on plasma etching of chalcogenides, characterization techniques and work on presentation skills, get trained on characterization tools. Work closely with Mentor - Leila

3rd Month

Get trained and practice coupon work and start small experiments in the cleanroom.

4th Month

The following steps will be carried out and repeated to understand what is an optimized or BKM recipe for chalcogenides.

Plan experiments with mentor. Expose samples to different plasma chemistry(etchant) and conditions

Physical characterization-AFM, SEM, TEM- To see if the surface is damaged

Chemical characterization-XPS,FTIR,EDS-to observe chemical changes in the sample and understand the chemical bonding between the plasma etchant and the chalcogenide during etching

Discussion and analyzing of the learnings with mentor and planning new experiments

Repeats steps 1 to 4 till a suitable etch chemistry and condition which doesn’t impact the material physically and chemically is achieved.

5th Month

6th Month

7th Month

8th Month

9th Month

10th Month

11th Month

12th Month

Start making the framework or story that will be used to contribute to a journal paper

Department

LST-CSH_Neural

Full Name of Mentor

Chutham

Email

Chutham.Sawigun@imec.be

Project Period

12 months

Project Topic

Artifact-tolerant analog frontend for neuromodulation system in high-voltage BCD technology

Summary of Research project

This project aims to achieve a neural amplifier for use in multichannel bidirectional neural interface systems. It needs to tolerate common-mode input voltage up to 10Vpp that comes from stimulation artifacts. At the same time, it must maintains its ability to amplify differential input signals with moderate gain (>50x) and good linearity (<1% THD). This amplifier will be developed further from imec IP to be ready to tape out (design, simulation and layout) in high-voltage BCD technology.

Monthly Plan

1st Month

Literature review

2nd Month

Literature review

3rd Month

Critical analysis of the imec IP (artifact-tolerant ac-coupled neural amplifier)

4th Month

Further develop the neural to meet the required specifications

5th Month

Further develop the neural to meet the required specifications

6th Month

Circuit design in BDC technology

7th Month

Circuit design in BDC technology　

8th Month

Circuit design in BDC technology　

9th Month

Chip layout 　

10th Month

Chip layout

11th Month

Working on verification plans (measurement procedures and pcb design).

12th Month

Paper drafting

Department

IMECBE-STS-APPM-UPM-ECCP-ETCH-ETCHADP

Full Name of Mentor

Rémi Vallat

Email

Remi.Vallat@imec.be

Project Period

12 months

Project Topic

Corrective selective hard mask growth for High NA patterning

Summary of Research project

Challenges introduced with High NA EUV lithography will be defectivity management with ultra-thin resists while using low EUV dose1. Reducing the density of bridges and breaks is thus a major point of focus for its introduction2. Ultra-thin resists, at low EUV dose, may come with high bridge/ break density (positive/ negative-tone resist, respectively). In the case of bridges, a descum step is traditionally introduced, which creates breaks instead (in ultra-thin resists) and further reduces the resist budget for underlayer patterning. Therefore, recovering breaks is a strategic capability for defect reduction.

The goal of the post-doc is to study the inner workings of existing processes to enable similar processes in other applications. The method consists of patterning an underplayer of suitable thickness for ultra-thin resists, and run a PECVD deposition process onto this prevent the formation of breaks. The way, the hard-mask budget is increased to prevent the formation of breaks during transfer into the stack, even and especially while patterning from an ultra-thin underlayer. Additionally, this method offers a reduced environmental footprint compared to conventional one as no or much thinner UL can be used requiring no or less high global warning potential gases to be used.

More specifically, you will:

Study the thermo-mechanical properties of the deposited material.

Develop post deposition processes to adapt the film properties and composition to the targeted application,

Investigate mechanisms of different defect mitigation approaches (atomic clean, super cycle, etc.),

Identify the nucleation mechanisms on ultrathin layer.

Monthly Plan

1st Month

General Imec trainings + Software trainings + Equipment trainings + Review of related papers

2nd Month

Software trainings + Equipment trainings + Review of related papers

3rd Month

Software trainings + Equipment trainings + Review of related papers

4th Month

Conducting an Experiment

5th Month

Conducting an Experiment

6th Month

Conducting an Experiment

7th Month

Conducting an Experiment

8th Month

Conducting an Experiment

9th Month

Deriving Results Data

10th Month

Deriving Results Data

11th Month

Drafting a paper (JVSTA)

12th Month

Drafting a paper (JVSTA)

Department

IMECBE-STS-APPM-UPM-ECCP-ETCH-ETCHSCE

Full Name of Mentor

Subhobroto Choudhury

Email

Subhobroto.Choudhury@imec.be

Project Period

12 months

Project Topic

Study of dep/etch cycling process for high aspect ratio etch

Summary of Research project

The advacned CMOs device development facing high aspect ratio etch process at Front-End-Of-Line (FEOL) features will be one of the main challenges to target better device performance.

One of the well-known challenges is mask selectivity improvement without clogging/under etch issue. In this project, we plan to focus on the development of dep/etch cycling approaches to mitigate future challenges in increased stack thickness.

Monthly Plan

1st Month

Equipment training, Review of related papers

2nd Month

Equipment training, Review of related papers

3rd Month

Equipment training, Review of related papers

4th Month

Conducting an Experiment

5th Month

Conducting an Experiment

6th Month

Conducting an Experiment

7th Month

Conducting an Experiment

8th Month

Conducting an Experiment

9th Month

Summary data and review

10th Month

Summary data and review

11th Month

Summary data and review

12th Month

Drafting a paper

Department

IMECBE-STS-APPM-UPM-ECCP-ETCH-ETCHSCE

Full Name of Mentor

Violeta Georgieva

Email

Violeta.Georgieva@imec.be

Project Period

12 months

Project Topic

Development of plasma dicing process for 3D integration

Summary of Research project

The 3D integration technology has received widespread attention from both academia and industry to create the desired breakthrough in chip scaling. Plasma dicing is a key interconnect technology for 3D integration in the future. It provides the opportunity to create vertically stacked chips in package, which can in turn deliver shorter interconnection delay, enable integration of heterogeneous technologies at a potentially lower cost and reduce time-to-market introduction. The Bosch process is widely used for plasma dicing to achieve vertical sidewalls in Si. The taper profile, bottom notching and side scallop-shaped roughness are well-known challenges for plasma dicing. The dielectric stack etch is however challenging and requires further improvement. Currently, it is done in the deep silicon etch chamber which has limitations considering dielectric etch. In this project, we plan to focus on the development of new process approaches to mitigate future challenges in increased thickness of the dielectric stack and possible separating the dielectric etch in a dedicated dielectric chamber.

Monthly Plan

1st Month

Equipment training, Review of related papers

2nd Month

Equipment training, Review of related papers

3rd Month

Equipment training, Review of related papers

4th Month

Conducting an Experiment

5th Month

Conducting an Experiment

6th Month

Conducting an Experiment

7th Month

Conducting an Experiment

8th Month

Conducting an Experiment

9th Month

Summary data and review

10th Month

Summary data and review

11th Month

Summary data and review

12th Month

Drafting a paper

Department

APPM

Full Name of Mentor

Guy Vereecke

Email

Guy.Vereecke@imec.be

Project Period

12 months

Project Topic

Wet processing of high aspect ratio nanostructures

Summary of Research project

In semiconductor manufacturing, new generations of devices have entered the nano-world, with critical dimensions of the order of 10 nm. Moreover, new transistor geometries are vertical, with the generation of 1-D and 2-D nano-confined spaces. While many process steps are still performed using aqueous chemistries, e.g. wet etching of materials for patterning and wet cleaning of surfaces. Recent studies have shown that nano-confinement is affecting all the steps in a wet process from wetting to chemical reactions, rinsing and drying. Evidence was found for water structuring, decreased permittivity, modified chemical equilibria and slower diffusivity in nanoconfined solutions.

Current activities target the wet etching of nanoconfined films, such as TiN in the RMG module of FinFET. In the etching tests, the etch rates on planar films are determined typically by ellipsometry, while cross-section-SEM (scanning electron microscopy) and image analysis are used on structures. Here the composition of etch chemistries are modified with additives to suppress the confinement effects. The student typically performs the wet etching tests, the ellipsometry measurements, the data treatment of the SEM pictures generated by operators in the pilot-line, and a kinetic analysis comparing planar to patterned etch rates, leading to new chemistry proposals. ATR-FTIR (attenuated total reflection Fourier-transform IR spectroscopy) can be used to confirm the impact of additives on water structuring, or to pre-select additives for testing. ATR- FTIR has become a major technique to characterize wetting and chemical reactions, as well as properties of aqueous solutions such as structuring, permittivity and diffusivity. Typically, the student prepares the ATR crystals (polishing), performs the FTIR tests using a home-build liquid cell, as well as the data treatment and interpretation. Progress in the understanding of phenomena are used to propose and test solutions to the confinement effects.

The content of the student project will be adapted depending on the progress of our research.

Monthly Plan

1st Month

introduction to imec and trainings

2nd Month

trainings

3rd Month

experimental work

4th Month

experimental work

5th Month

experimental work

6th Month

experimental work

7th Month

experimental work

8th Month

experimental work

9th Month

experimental work

10th Month

preparation of conference paper

for UCPSS, ECS or SPCC, depending on timing)

11th Month

presentation at conference, writing of journal paper

12th Month

writing of journal paper and submission

Department

UPM/ECCP

Name of Mentor

XiuMei Xu

Email

XiuMei.Xu@imec.be

Project Period

12 months

Project Topic

In-situ ATR-FTIR study of wetting transition on HAR nanostructures

Summary of Research project

In-situ characterization techniques are critical for capturing the wetting transition on nanostructures. In previous work, we demonstrated that a novel application of attenuated total reflectance--Fourier transform infrared (ATR-FTIR) spectroscopy allows for direct probing of wetting states and dynamics on nanostructured surfaces. Building on these insights, this project will further explore how various structural geometries, pattern densities, surface chemistries, and wet solutions affect the wetting state at the nanoscale.

Monthly Plan

1st Month

Safety, cleanroom, lab and tool training, literature study

2nd Month

tool training + ATR crystal preparation, literature study

3rd Month

Silane oven deposition, contact angle + ATR-FTIR experiments (L/S structure 1)

4th Month

Silane oven deposition, contact angle + ATR-FTIR experiments (L/S structure 2)

5th Month

Silane oven deposition, contact angle + ATR-FTIR experiments (L/S structure 3)

6th Month

review results and compare with FDTD simulations

7th Month

Silane oven deposition, contact angle + ATR-FTIR experiments (Asymmetric pillar 1)

8th Month

Silane oven deposition, contact angle + ATR-FTIR experiments (Asymmetric pillar 2)

9th Month

review results and compare with FDTD simulations

10th Month

review results and compare with FDTD simulations

11th Month

wetting model development, drafting of paper

12th Month

drafting of paper, report final results in group meeting

Department

Sensors and Actuators

Full Name of Mentor

Myonglae Chu

Email

myonglae.chu@imec.be

Project Period

12 months

Project Topic

Next-generation Readout Circuit Design of Thin-film Photodiode(TFPD) based image sensor for SWIR detection

)Summary of Research project

Image sensors based on Thin-Film Photodiodes are being extensively studied for detecting short-wave infrared(SWIR) light. These alternative materials provide greater signal detection compared to silicon-based photodiodes and offer a more cost-effective fabrication process. SWIR imaging is particularly advantageous as it is less affected by fine airborne particles, allowing these sensors to mitigate the impact of mist, smoke, dust, and other substances. This results in clear imaging of subjects that may be imperceptible to the human eye or conventional RGB image sensors. In addition to developing SWIR photodiodes, it is essential to optimize new circuit designs for readout, pixel driving, and control to achieve optimal pixel performance. Key activities may include: floating node leakage reduction, reset KTC noise suppression, power supply noise cancellation, new readout circuit design at the pixel level. In this project, internship students will engage in research that primarily involves reviewing literature, understanding SWIR pixel and sensor operations, ideating new circuit and sensor system concepts, and conducting circuit modeling and simulation to demonstrate the feasibility of the proposed ideas.

Monthly Plan

1st Month

Equipment training, Review of related papers

2nd Month

Equipment training, Review of related papers

3rd Month

Review of related papers, Ideation of new circuit concept

4th Month

Ideation of new circuit concept, Circuit modeling and simulation

5th Month

Circuit Design : Modeling and Simulation

6th Month

Circuit Design : Modeling and Simulation

7th Month

Circuit Design : Modeling and Simulation

8th Month

Circuit Design : Simulation, Layout and Post-simulation

9th Month

Circuit Design : Simulation, Layout and Post-simulation

10th Month

Deriving Results Data

11th Month

Drafting a paper (MDPI sensors / Electronics)

12th Month

Drafting a paper (MDPI sensors / Electronics)